DS200UCPBG5ADA

Product Description

The DS200UCPBG5ADA functions within the GE Mark V turbine control system as an IO Engine CPU Board.  The Mark V was created by GE as one of their Speedtronic turbine control systems used for the management of industrial steam and gas turbine systems.  This is one available version of this board within AX Control’s inventory.  If this version doesn’t meet your exact requirements please look through our inventory for other available versions. 

The DS200UCPBG5ADA is built using a SIMM (single inline memory module) socket that has DRAM (dynamic random access memory) and EPROM (flash erasable programmable read-only memory).   The board also has two RS-232 serial ports and an ARCNET driver.   This board is used within the <R5> I/O engine; however, a UCPB board is used in the <R1>, <R2>, and <R3> IOs.  

The IO engine of the Mark V system is designed to read I/O configuration if the IO core is rebooted.   I/O configuration information is written across IONET to all the digital I/O boards to any connected analog I/O boards.   Since the UCPB processor packages both analog and digital I/O information so it can be broadcast to the COREBUS, this configuration update will affect the DS200UCPBG5ADA board.  

The DS200UCPBG5ADA is both hardware and software configurable.  The board has three hardware jumpers on its surface.  This includes one used for factory test and one used to select 486 local bus speed.  The board also has DIP switches that can be used to set the COREBUS address for any given I/O Engine. 

Use GE manuals for additional information.